%A Egon Horbst
%A Gerd Sandweg
%A Stefan Wallstab
%T Practical experience with VLSI methodology
%J Proceedings of the Third Caltech Conference on Very Large Scale Integration
%C Pasadena, California
%D March 1983
%E Randal Bryant
%O published by Springer-Verlag
%K calt_vlsi, VLSI
%P 1-13

%A F. Anceau
%T CAPRI: a design methodology and a silicon compiler
for VLSI circuits specified by algorithms
%J Proceedings of the Third Caltech Conference on Very Large Scale Integration
%C Pasadena, California
%D March 1983
%E Randal Bryant
%O published by Springer-Verlag
%K calt_vlsi, VLSI
%P 15-31

%A John L. Hennessy
%A Norman P. Jouppi
%A Steven Przybylski
%A Christopher Rowen
%A Thomas Gross
%T Design of a high performance VLSI processor
%J Proceedings of the Third Caltech Conference on Very Large Scale Integration
%C Pasadena, California
%D March 1983
%E Randal Bryant
%O published by Springer-Verlag
%K calt_vlsi, VLSI
%P 33-54
%K MIPS

%A Daniel W. Dobberpuhl
%T Fundamental issues in the electrical design of VLSI circuits
(abstract only)
%J Proceedings of the Third Caltech Conference on Very Large Scale Integration
%C Pasadena, California
%D March 1983
%E Randal Bryant
%O published by Springer-Verlag
%K calt_vlsi, VLSI
%P 55

%A John K. Ousterhout
%T Crystal: a timing analyzer for nMOS VLSI circuits
%J Proceedings of the Third Caltech Conference on Very Large Scale Integration
%C Pasadena, California
%D March 1983
%E Randal Bryant
%O published by Springer-Verlag
%K calt_vlsi, VLSI
%P 57-69

%A Norman P. Jouppi
%T TV: an nMOS timing analyzer
%J Proceedings of the Third Caltech Conference on Very Large Scale Integration
%C Pasadena, California
%D March 1983
%E Randal Bryant
%O published by Springer-Verlag
%K calt_vlsi, VLSI
%P 71-85
%K MIPS

%A Charles E. Leiserson
%A Flavio M. Rose
%A James B. Saxe
%T Optimizing synchronous circuitry by retiming (preliminary version)
%J Proceedings of the Third Caltech Conference on Very Large Scale Integration
%C Pasadena, California
%D March 1983
%E Randal Bryant
%O published by Springer-Verlag
%K calt_vlsi, VLSI
%P 87-116

%A Wan S. Chan
%T A new channel routing algorithm
%J Proceedings of the Third Caltech Conference on Very Large Scale Integration
%C Pasadena, California
%D March 1983
%E Randal Bryant
%O published by Springer-Verlag
%K calt_vlsi, VLSI
%P 117-139

%A Ron Y. Pinter
%T River routing: methodology and analysis
%J Proceedings of the Third Caltech Conference on Very Large Scale Integration
%C Pasadena, California
%D March 1983
%E Randal Bryant
%O published by Springer-Verlag
%K calt_vlsi, VLSI
%P 141-163

%A Jonathan W. Greene
%A Abbas El Gamal
%T Area and delay penalties in restructurable wafer-scale arrays
%J Proceedings of the Third Caltech Conference on Very Large Scale Integration
%C Pasadena, California
%D March 1983
%E Randal Bryant
%O published by Springer-Verlag
%K calt_vlsi, VLSI
%P 165-184

%A Robert E. Shostak
%T Verification of VLSI designs
%J Proceedings of the Third Caltech Conference on Very Large Scale Integration
%C Pasadena, California
%D March 1983
%E Randal Bryant
%O published by Springer-Verlag
%K calt_vlsi, VLSI
%P 185-206

%A Marina C. Chen
%A Carver A. Mead
%T A hierarchical simulator based on formal semantics
%J Proceedings of the Third Caltech Conference on Very Large Scale Integration
%C Pasadena, California
%D March 1983
%E Randal Bryant
%O published by Springer-Verlag
%K calt_vlsi, VLSI
%P 207-223

%A Martin Rem
%A Jan L.A. van\ de\ Snepscheut
%A Jan Tijmen Udding
%T Trace theory and the definition of hierarchical components
%J Proceedings of the Third Caltech Conference on Very Large Scale Integration
%C Pasadena, California
%D March 1983
%E Randal Bryant
%O published by Springer-Verlag
%K calt_vlsi, VLSI
%P 225-239

%A Jan L.A. van\ de\ Snepscheut
%T Deriving circuits from programs
%J Proceedings of the Third Caltech Conference on Very Large Scale Integration
%C Pasadena, California
%D March 1983
%E Randal Bryant
%O published by Springer-Verlag
%K calt_vlsi, VLSI
%P 241-256

%A Alan B. Hayes
%T Self-timed IC design with PPL's
%J Proceedings of the Third Caltech Conference on Very Large Scale Integration
%C Pasadena, California
%D March 1983
%E Randal Bryant
%O published by Springer-Verlag
%K calt_vlsi, VLSI
%P 257-274

%A Edward H. Frank
%A Robert F. Sproull
%T A self-time static RAM
%J Proceedings of the Third Caltech Conference on Very Large Scale Integration
%C Pasadena, California
%D March 1983
%E Randal Bryant
%O published by Springer-Verlag
%K calt_vlsi, VLSI
%P 275-285

%A Allan L. Fisher
%A H.T. Kung
%A Louis M. Monier
%A Hank Walker
%A Yasunori Dohi
%T Design of the PSC: a programmable systolic chip
%J Proceedings of the Third Caltech Conference on Very Large Scale Integration
%C Pasadena, California
%D March 1983
%E Randal Bryant
%O published by Springer-Verlag
%K calt_vlsi, VLSI
%P 287-302

%A T.K. Truong
%A L.J. Deutsch
%A I.S. Reed
%A I.S. Hsu
%A K. Wang
%A C.S. Yeh
%T The VLSI design of a Reed-Solomon encoder
using Berlekamp's bit-serial multiplier algorithm
%J Proceedings of the Third Caltech Conference on Very Large Scale Integration
%C Pasadena, California
%D March 1983
%E Randal Bryant
%O published by Springer-Verlag
%K calt_vlsi, VLSI
%P 303-329

%A Jonathan Schaeffer
%A P.A.D. Powell
%A Jim Jonkman
%T A VLSI chess legal move generator
%J Proceedings of the Third Caltech Conference on Very Large Scale Integration
%C Pasadena, California
%D March 1983
%E Randal Bryant
%O published by Springer-Verlag
%K calt_vlsi, VLSI
%P 331-350
%K Hitech

%A Joseph Ja'Ja'
%A Robert Michael Owens
%T New VLSI architectures with reduced hardware
%J Proceedings of the Third Caltech Conference on Very Large Scale Integration
%C Pasadena, California
%D March 1983
%E Randal Bryant
%O published by Springer-Verlag
%K calt_vlsi, VLSI
%P 351-377

%A Wayne Wolf
%A John Newkirk
%A Robert Mathews
%A Robert Dutton
%T Dumbo, a schematic-to-layout compiler
%J Proceedings of the Third Caltech Conference on Very Large Scale Integration
%C Pasadena, California
%D March 1983
%E Randal Bryant
%O published by Springer-Verlag
%K calt_vlsi, VLSI
%P 379-393

%A Stephen P. Pope
%A R.W. Brodersen
%T Macrocell design for concurrent signal processing
%J Proceedings of the Third Caltech Conference on Very Large Scale Integration
%C Pasadena, California
%D March 1983
%E Randal Bryant
%O published by Springer-Verlag
%K calt_vlsi, VLSI
%P 395-412

%A Neil Bergmann
%T A case study of the F.I.R.S.T. silicon compiler
%J Proceedings of the Third Caltech Conference on Very Large Scale Integration
%C Pasadena, California
%D March 1983
%E Randal Bryant
%O published by Springer-Verlag
%K calt_vlsi, VLSI
%P 413-430