%A William M. Conner
%A Edward R. Dirling
%T Input/output considerations in look-ahead processing
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 6
%N 1
%D June 1977
%P 7-13

%A Robert F. Rosin
%T The significance of microprogramming
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 6
%N 1
%D June 1977
%P 14-19

%A Glenford J. Myers
%T The case against stack-oriented instruction sets
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 6
%N 3
%D August 1977
%P 7-10

%A Andrew S. Tanenbaum
%T Ambiguous machine architecture and program efficiency
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 6
%N 3
%D August 1977
%P 11-13

%A D.R. Hicks
%T Microprogramming with a content-addressable read-only-memory
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 6
%N 3
%D August 1977
%P 14-15

%A D.R. Hicks
%T Multitasking as a program structuring primitive
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 6
%N 3
%D August 1977
%P 16-18

%A G.J. Lipovski
%T Further remarks on the microprocessors of the future
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 6
%N 3
%D August 1977
%P 19-21

%A David B. Misunas
%T Workshop on data flow computer and program organization
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 6
%N 4
%D October 1977
%P 6-22

%A R.A. Hagan
%A C.S. Wallace
%T A virtual memory system for the Hewlett Packard 2100A
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 6
%N 5
%D December 1977
%P 5-13

%A Forest Baskett
%T More on microprocessors of the future
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 6
%N 5
%D December 1977
%P 14-17

%A Yaohan Chu
%T Direct-execution computer architecture
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 6
%N 5
%D December 1977
%P 18-23

%A Peter U. Schulthess
%A Eduard P. Mumprecht
%T Reply to the case against stack-oriented instruction sets
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 6
%N 5
%D December 1977
%P 24-27

%A David K. Hsiao
%T Very large International Conference on Very Large Data Bases
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 6
%N 5
%D December 1977
%P 28-30

%A John B. Mountain
%A Philip H. Enslow,\ Jr.
%T Application of the military Computer Famility Architecture
selection criteria to the PR1ME P400
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 6
%N 6
%D February 1978
%P 3-17

%A G. Jack Lipovski
%T Just a few more words on microprocessors of the future
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 6
%N 6
%D February 1978
%P 18-21

%A J.L. Keedy
%T On the use of stacks in the evaluation of expressions
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 6
%N 6
%D February 1978
%P 22-28

%A Peter J. Denning
%T Sixth Symposium on Operating Systems Principles - commentary
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 6
%N 6
%D February 1978
%P 30

%A Geroge E. Lindamood
%T Some delitescent concepts in computer architecture
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 6
%N 8
%D April 1978
%P 4-5

%A M.J. Flynn
%T A canonic interpretive program form
for measuring "ideal" HLL architectures
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 6
%N 8
%D April 1978
%P 6-15

%A Peter J. Denning
%T A question of semantics
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 6
%N 8
%D April 1978
%P 16-18

%A Richard L. Sites
%T A combined register-stack architecture
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 6
%N 8
%D April 1978
%P 19

%A Lyle A. Cox,\ Jr.
%A James R. McGraw
%A Charles S. Wetherell
%T Design team composition
for high level language computer architectures
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 6
%N 8
%D April 1978
%P 20-22

%A Ian J. Hayes
%T Some remarks on "Ambiguous machine architecture"
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 6
%N 8
%D April 1978
%P 23-24

%A G.J. Battarel
%A R.J. Chevance
%T Design of a high level language machine
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 6
%N 9
%D June 1978
%P 5-17

%A Rod Steel
%T A rider to "A question of semantics"
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 6
%N 9
%D June 1978
%P 18-19

%A Glenford J. Myers
%T The evaluation of expressions in a storage-to-storage architecture
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 6
%N 9
%D June 1978
%P 20-23

%A Dileep P. Bhandarkar
%T Semiconductor technology: trends and implications
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 7
%N 1
%D August 1978
%P 4-14

%A A.J. Payne
%T A computer console design to help the operator
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 7
%N 1
%D August 1978
%P 15-22

%A Kenneth J. Thurber
%T Computer communication techniques
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 7
%N 3
%D October 1978
%P 7-16

%A Hal W. Jennings
%T A variation on the PDP 11
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 7
%N 3
%D October 1978
%P 17-26

%A Per Brinch\ Hansen
%T Multiprocessor architectures for concurrent programs
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 7
%N 4
%D December 1978
%P 4-23

%A J.L. Keedy
%T On the evaluation of expressions
using accumulators, stacks and store-to-store instructions
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 7
%N 4
%D December 1978
%P 24-27

%A Harvey G. Cragon
%T An evaluation of code space requirements and performance
of various architectures
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 7
%N 5
%D February 1979
%P 5-21

%A Kenneth J. Thurber
%A Harvey A. Freeman
%T A bibliography of local computer network architectures
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 7
%N 5
%D February 1979
%P 22-27

%A Lyle A. Cox,\ Jr.
%T The nature of "computer architecture"
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 7
%N 7
%D April 1979
%P 8-12

%A Jan L.A. van\ de\ Snepsoheut
%T Introducing the notion of processes to hardware
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 7
%N 7
%D April 1979
%P 13-23

%A Randall Gibson
%A Paul Anderson
%T Technical overview of the Renaissance Octobus system
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 7
%N 8
%D June 1979
%P 2-9

%A Johan W. Stevenson
%A Andrew S. Tanenbaum
%T Efficient encoding of machine instructions
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 7
%N 8
%D June 1979
%P 10-17

%A J.L. Keedy
%T More on the use of stacks in the evaluation of expressions
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 7
%N 8
%D June 1979
%P 18-22

%A G.E. Quick
%T Intelligent memory - "a parallel processing concept"
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 7
%N 8
%D June 1979
%P 23-28

%A Ronald L. Rivest
%T The BLIZZARD computer architecture
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 7
%N 9
%D August 1979
%P 2-10

%A J.L. Keedy
%T A technique for passing reference parameters
in an information-hiding architecture
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 7
%N 9
%D August 1979
%P 11-15

%A Krishna M. Kavipurapu
%T Quantification of architectures using software science
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 7
%N 10
%D October 1979
%P 2-6

%A Trevor Turton
%T A proposed high-speed computer design
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 7
%N 10
%D October 1979
%P 7-21

%A Charles Crowley
%T The architecture of clocks
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 7
%N 11
%D December 1979
%P 4-10

%A Dennis J. Frailey
%T Innovations in microprocessor architecture - another view
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 7
%N 11
%D December 1979
%P 11-13

%A Ashoke Deb
%T Conflict-free access of arrays - a counter example
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 7
%N 11
%D December 1979
%P 14-15

%A Dana Richards
%T On a "counter - example"
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 8
%N 2
%D April 1980
%P 2-3

%A Peter J. Denning
%T Why not innovations in computer architecture ?
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 8
%N 2
%D April 1980
%P 4-7

%A G.W. Gerrity
%T Hardware detection of undefined references
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 8
%N 2
%D April 1980
%P 8-11

%A Peter J. Denning
%A T. Don Dennis
%T On minimizing contention at semaphores
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 8
%N 2
%D April 1980
%P 12-19

%A Harvey A. Freeman
%A Kenneth J. Thirber
%T Updated bibliography on local computer networks
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 8
%N 2
%D April 1980
%P 20-28


%A Julian Davies
%T Clock architecture and management
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 8
%N 5
%D August 1980
%P 3-6

%A G. Chroust
%A J.R. Muhlbacher
%T Rivalling multiprocessor organization
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 8
%N 5
%D August 1980
%P 6-10

%A David Stevenson
%T A report on the proposed IEEE floating point standard
(IEEE task P754)
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 8
%N 5
%D August 1980
%P 11-12

%A Justin Rattner
%A George Cox
%T Object-based computer architecture
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 8
%N 6
%D October 1980
%P 4-11

%A G.J. Myers
%A B.R.S. Buckingham
%T A hardware implementation of capability-based addressing
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 8
%N 6
%D October 1980
%P 12-24

%A David A. Patterson
%A David R. Ditzel
%T The case for the reduced instruction set computer
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 8
%N 6
%D October 1980
%P 25-33

%A Douglas W. Clark
%A William D. Strecker
%T Comments on "The case for the reduced instruction set computer"
by Patterson and Ditzel
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 8
%N 6
%D October 1980
%P 34-38

%A James C. Brakefield
%T Is 32 bits of address to much ?
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 8
%N 6
%D October 1980
%P 39-40

%A James C. Brakefield
%T The peripheral bus
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 8
%N 6
%D October 1980
%P 41-43

%A Karl Reed
%T The way forward in computer architecture research
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 8
%N 7
%D December 1980
%P 3-7

%A John Gilmore
%T Suggested enhancements to the Motorola MC68000
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 8
%N 7
%D December 1980
%P 8-14

%A John F. Wakerly
%T Pascal extensions for describing computer instruction sets
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 8
%N 7
%D December 1980
%P 15-23

%A Krishna M. Kavi
%T Semantics of an algorithm
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 8
%N 7
%D December 1980
%P 24-26

%A Philip C. Treleaven
%T VLSI: machine architecture and very high level languages
- workshop report
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 8
%N 7
%D December 1980
%P 27-38

%A Martin L. de\ Prycker
%T A new index mode for the VAX-11
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 9
%N 2
%D April 1981
%P 10-11

%A David Stevenson
%T The Phoenix project
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 9
%N 2
%D April 1981
%P 12-15

%A E.M.J.C. van\ Oost
%T Multi-processor system description and simulation
using structured multi-programming languages
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 9
%N 2
%D April 1981
%P 16-32


%A G.W. Gerrity
%T On processes and interrupts
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 9
%N 4
%D June 1981
%P 4-14

%A Dwight D. Hill
%T A hardware mechanism for supporting range checks
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 9
%N 4
%D June 1981
%P 15-21

%A Vladimir S. Cherniavsky
%T The computing memory - another distributed computer architecture
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 9
%N 4
%D June 1981
%P 22-24

%A James E. Thornton
%T Heterogeneous computer architecture
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 9
%N 4
%D June 1981
%P 25-33

%A Donald C. Lindsay
%T Cache memory for microprocessors
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 9
%N 5
%D August 1980
%P 6-13

%A Krishna M. Kavi
%T Innovative architectures and commercial computers:
a summary of the panel discussion at NCC 1981
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 9
%N 5
%D August 1981
%P 14-16

%A C.K. Yuen
%T Extending the power of short-wordlength processors
by means of context-dependent machine instructions
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 9
%N 6
%D October 1981
%P 9-15

%A Allan Gottlieb
%A Clyde P. Kruskal
%T Coordinating parallel processors: a partial unification
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 9
%N 6
%D October 1981
%P 16-24
%K fetch-and-add, NYU ultracomputer

%A Charlie McDowell
%T Protection at the micromachine level
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 10
%N 1
%D March 1982
%P 4-8

%A Edward A. Fesutel
%T Protected procedure call on the PR1ME machines
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 10
%N 1
%D March 1982
%P 9-22

%A Hossam El-Halabi
%A Dharma P. Agrawal
%T Some remarks on direct execution computers
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 10
%N 1
%D March 1982
%P 23-27

%A Daniel T. Fitzpatrick
%A John K. Foderaro
%A Manolis G.H. Katevenis
%A Howard A. Landman
%A David A. Patterson
%A James B. Peek
%A Zvi Peshkess
%A Carlo H. Sequin
%A Robert W. Sherburne
%A Korbin S. van\ Dyke
%T A RISCy approach to VLSI
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 10
%N 1
%D March 1982
%P 28-32


%A Alastair J.W. Mayer
%T The architecture of the Burroughs B5000
- 20 years later and still ahead of the times ?
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 10
%N 4
%D June 1982
%P 3-10

%A James C. Brakefield
%T From the other side of the Atlantic,
how to improve upon the MU5 design
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 10
%N 4
%D June 1982
%P 11-16

%A Paul M. Hansen
%A Mark A. Linton
%A Robert N. Mayo
%A Marguite Murphy
%A David A. Patterson
%T A performance evaluation of the Intel iAPX 432
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 10
%N 4
%D June 1982
%P 17-26

%A Miguel Huguet
%T The protection of the processor status word of the PDP-11/60
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 10
%N 4
%D June 1982
%P 27-30

%A James Brakefield
%T Just what is an op-code ?
or a universal computer design
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 10
%N 4
%D June 1982
%P 31-34

%A J.D. Knott
%A T.W. Crockett
%T Fair dynamic arbitration
for a multiprocessor communications bus
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 10
%N 5
%D September 1982
%P 4-9

%A James R. Larus
%T A comparison of microcode, assemby code, and high-level languages
on the VAX-11 and RISC I
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 10
%N 5
%D September 1982
%P 10-15

%A David A. Patterson
%T A performance evaluation of the Intel 80286
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 10
%N 5
%D September 1982
%P 16-18

%A Rod Egan
%T The effect of VLSI on computer architecture
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 10
%N 5
%D September 1982
%P 19-22

%A Henry M. Levy
%A Douglas W. Clark
%T On the use of benchmarks for measuring system performance
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 10
%N 6
%D December 1982
%P 5-8

%A Peter Schultess
%A Fritz Vonaesch
%T OPA - a new architecture for Pascal-like languages
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 10
%N 6
%D December 1982
%P 9-20

%A James C. Brakefield
%T Talk on interpreters
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 10
%N 6
%D December 1982
%P 21-28

%A D.W. Doran
%T Main frame computer trends
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 10
%N 6
%D December 1982
%P 29-44

%A Daniel Gajski
%A David Kuck
%A Duncan Lawrie
%A Ahmed Sameh
%T CEDAR, a large scale multiprocessor
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 11
%N 1
%D March 1983
%P 7-11

%A Elaine French
%A Hugh Glaser
%T TUKI, a data flow processor
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 11
%N 1
%D March 1983
%P 12-18

%A Nenad Marovac
%T A systematic approach to the design and implementation
of a computer instruction set
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 11
%N 1
%D March 1983
%P 19-24

%A Harvey Cragon
%T Executable instruction set specification
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 11
%N 1
%D March 1983
%P 25-43

%A Robert P. Colwell
%A Charles Y. Hitchcock,\ III
%A E. Douglas Jensen
%T Peering through the RISC/CISC fog: an outline of research
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 11
%N 1
%D March 1983
%P 44-50

%A W.J. Tracz
%T MICRO 15 synopsis
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 11
%N 1
%D March 1983
%P 51-54

%A David Abramson
%A John Rosenberg
%T Hardware support for program debuggers in a paged virtual memory
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 11
%N 2
%D June 1983
%P 8-19

%A Dennis J. Frailey
%T Word length of a computer architecture
- definitions and applications
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 11
%N 2
%D June 1983
%P 20-26


%A Dwight D. Hill
%T An analysis of C machine support
for other block-structured languages
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 11
%N 4
%D September 1983
%P 6-16

%A Nenad Marovac
%T On interprocess interaction in distributed architectures
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 11
%N 4
%D September 1983
%P 17-22

%A Robert J. Schalkoff
%T Towards an efficient, dedicated architecture
for a digital geometric image transformer (DGIT)
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 11
%N 4
%D September 1983
%P 23-29

%A Arieh Plotkin
%A Daniel Tabak
%T A tree structured architecture for semantic gap reduction
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 11
%N 4
%D September 1983
%P 30-44

%A Maurice V. Wilkes
%T Keeping jump instructions out of the pipeline
of a RISC-like computer
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 11
%N 5
%D December 1983
%P 5-7

%A Jeremy Jones
%T Puzzling with microcode
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 11
%N 5
%D December 1983
%P 8-12

%A Wayne Amsbury
%T A code-splitting algorithm
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 11
%N 5
%D December 1983
%P 13-21

%A Jack J. Dongarra
%T Performance of various computers
using standard linear equations software
in a fortran environment
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 11
%N 5
%D December 1983
%P 22-27

%A M.R. Bhujade
%T On the design of always compatible
instruction set architecture (ACISA)
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 11
%N 5
%D December 1983
%P 28-30

%A J.L. Heath
%T Re-evaluation of the RISC I
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 12
%N 1
%D March 1984
%P 3-10

%A David A. Patterson
%T RISC watch
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 12
%N 1
%D March 1984
%P 11-19

%A Michael Beeler
%T Beyond the Baskett benchamrk
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 12
%N 1
%D March 1984
%P 20-31

%A Edward A. Feustel
%T Process exchange on the Prolog!ME family of computers
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 12
%N 1
%D March 1984
%P 32-43

%A P.M. Fenwick
%T Addressing operations for automatic data structure accessing
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 12
%N 1
%D March 1984
%P 44-57

%A C.K. Yuen
%T Some applications of the implicit register reference
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 12
%N 1
%D March 1984
%P 58-63

%A Krishna M. Kavi
%A K. Krishnamohan
%T Architecture quality
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 12
%N 1
%D March 1984
%P 64-72

%A Dharma P. Agrawal
%T B-HIVE: a heterogeneous, interconnected,
versatile and expandable multicomputer system
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 12
%N 2
%D June 1984
%P 7-13

%A J.C. Browne
%A G. Almasi
%T The workshop on university/industry/government collaboration
on research in parallel computing
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 12
%N 2
%D June 1984
%P 15-32


%A Gilman D. Chesley
%T A wafer microcomputer
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 12
%N 4
%D September 1984
%P 4-6

%A Howard Jay Siegel
%A Thomas Schwederski
%A Nathaniel J. Davis, IV
%A James T. Kuehn
%T PASM: a reconfigurable parallel system
for image processing
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 12
%N 4
%D September 1984
%P 7-19

%A J. Aslam
%T Methodology for designing a computer architecture
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 12
%N 5
%D December 1984
%P 4-11

%A P.C.J. Graham
%T Providing architectural support for expert systems
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 12
%N 5
%D December 1984
%P 12-18

%A J.J. Dongarra
%T Performance of various computers
using standard linear equations software in a Fortran environment
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 13
%N 1
%D March 1985
%P 3-11

%A T.M. Hor
%A C.K. Yuen
%T The design and programming of a powerful short wordlength processor
using context-dependent machine instructions
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 13
%N 1
%D March 1985
%P 12-26

%A E.N. Miya
%T Multiprocessor/distributed processing bibliography
(in machine-readable form)
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 13
%N 1
%D March 1985
%P 27-29

%A W. Hu
%T Dataflow architecture for EEG patient monitor
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 13
%N 2
%D June 1985
%P 3-10

%A A.G. Tagg
%T Speculations on the evolution of an architecture
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 13
%N 2
%D June 1985
%P 11-18

%A B. Randell
%T Hardware/software tradeoffs: a general design principle ?
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 13
%N 2
%D June 1985
%P 19-21


%A J.-Fr. Hake
%T PDOC - a database on parallel processing literature
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 13
%N 4
%D September 1985
%P 2-7

%A M. Rokey
%T The dataflow architecture: a suitable base
for the implementation of expert systems
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 13
%N 4
%D September 1985
%P 8-14

%A H. Cragon
%T An architecture design system
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 13
%N 4
%D September 1985
%P 15-21

%A M. Huguet
%A T. Lang
%T A reduced register file for RISC architectures
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 13
%N 4
%D September 1985
%P 22-31

%A Cedell A. Alexander
%A William M. Keshlear
%A Faye Briggs
%T Translation buffer performance in a Unix environment
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 13
%N 5
%D December 1985
%P 2-14
%K biased set associative cache

%A Rosanna Lee
%T On "hot spot" contention
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 13
%N 5
%D December 1985
%P 15-20

%A Richard O'Keefe
%T A comment on "A hardware unification unit: design and analysis"
by Nam Sung Woo
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 14
%N 1
%D January 1986
%P 2-3

%A A.B. Ruighaver
%T Design aspects of the Delft parallel processor DPP84
and its programming system
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 14
%N 1
%D January 1986
%P 4-8

%A Dan Hammerstrom
%A David Maier
%A Shreekant Thakkar
%T The cognitive architecture project
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 14
%N 1
%D January 1986
%P 9-21

%A Alan Jay Smith
%T Bibliography and readings on CPU cache memories and related topics
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 14
%N 1
%D January 1986
%P 22-42


%A Nam Sung Woo
%T A reply to "A comment on 'A hardware unification unit:
design and analysis'"
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 14
%N 3
%D June 1986
%P 2-4

%A D.K. DuBose
%A D.K. Fotakis
%A D. Tabak
%T A microcoded RISC
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 14
%N 3
%D June 1986
%P 5-16

%A Tomas Lang
%A Miquel Huguet
%T Reduced register saving/restoring in single-window register files
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 14
%N 3
%D June 1986
%P 17-26

%A Larry O'Nel Rouse
%T The twisted double helix: a minimum distance architecture
for 5th generation computing
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 14
%N 3
%D June 1986
%P 27-33

%A David M. Harland
%T A recursively microcodable tagged architecture
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 14
%N 3
%D June 1986
%P 34-40

%A Cedell Alexander
%A William Keshlear
%A Furrokh Cooper
%A Faye Briggs
%T Cache memory performance in a Unix environment
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 14
%N 3
%D June 1986
%P 41-70

%A Roger Stokes
%T Traces for hardware verification
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 14
%N 4
%D September 1986
%P 7-14

%A Claudio Kirner
%A Eduardo Marques
%T Design of a distributed system support based on a centralized parallel bus
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 14
%N 4
%D September 1986
%P 15-26

%A David M. Harland
%A Bruno Beloff
%T Microcoding an object-oriented instruction set
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 14
%N 5
%D December 1986
%P 3-12

%A William Stallings
%T An annotated bibliography on reduced instruction set computers
%P 13-19
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 14
%N 5
%D December 1986
%K RISC

%A Robert H. Halstead,\ Jr.
%T Overview of Concert Multilisp: a multiprocessor symbolic computing system
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 15
%N 1
%D March 1987
%P 5-14

%A Dave Patterson
%T A progress report on SPUR: February 1, 1987
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 15
%N 1
%D March 1987
%P 15-21

%A A. Despain
%A Y. Patt
%A V. Srini
%A P. Bitar
%A W. Bush
%A C. Chien
%A B. Fagin
%A W. Hwu
%A S. Melvin
%A R. McGeer
%A A. Singhal
%A M. Shebanow
%A P. van\ Roy
%T Aquarius
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 15
%N 1
%D March 1987
%P 22-34

%A Madhur Kohli
%A Mark E. Giuliano
%A Jack Minker
%T An overview of the PRISM project
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 15
%N 1
%D March 1987
%P 35-42

%A M.V. Hermenegildo
%A R.A. Warren
%T Designing a high performance parallel logic programming system
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 15
%N 1
%D March 1987
%P 43-52

%A Jonathan W. Mills
%T Coming to grips with a RISC:
a report of the progress of the LOW RISC design group
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 15
%N 1
%D March 1987
%P 53-62

%A Brian K. Short
%T Use of instruction set simulators to evaluate the LOW RISC
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 15
%N 1
%D March 1987
%P 63-67

%A Kurt M. Gutzmann
%T Optimal dimension of hypercubes for sorting
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 15
%N 1
%D March 1987
%P 68-72

%A Gilman Chesley
%T Addressable WSI: a non-redundant approach
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 15
%N 1
%D March 1987
%P 73-80

%A Nripendra N. Biswas
%A S. Srinivas
%A Trishala Dharanendra
%T A centrally controlled shuffle network
for reconfigurable and fault-tolerant architecture
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 15
%N 1
%D March 1987
%P 81-87

%A Matthew Moore
%A Charles McDowell
%T Bi-directional networks for large parallel processors
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 15
%N 3
%D June 1987
%P 3-4

%A Ian Kaplan
%T The LDF 100: a large grain dataflow parallel processor
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 15
%N 3
%D June 1987
%P 5-12

%A Stanley Lass
%T Wide channel computers
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 15
%N 3
%D June 1987
%P 13-16

%A Reinder J. Bril
%T An implementation independent approach to cache memories
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 15
%N 3
%D June 1987
%P 17-24

%A Reinder J. Bril
%T On cacheability of lock-variables in tightly coupled multiprocessor systems
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 15
%N 3
%D June 1987
%P 25-32

%A J.K. Iliffe
%T A forward-looking method of cache memory control
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 15
%N 4
%D September 1987
%P 4-10
%K FL, PN Pointer-Number machine

%A Amitava Bandyopadhay
%A Yuan F. Zheng
%T Combining both micro-code and hardwired control in RISC
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 15
%N 4
%D September 1987
%P 11-15

%A Martin Dowd
%T An example RISC vector machine architecture
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 15
%N 4
%D September 1987
%P 16-22

%A Sanjiv K. Bhatia
%A A.G. Starling
%T Multilayered Illiac network scheme
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 15
%N 4
%D September 1987
%P 23-31

%A Lothar Nowak
%T SAMP: a general purpose processor based on a self-timed VLIW structure
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 15
%N 4
%D September 1987
%P 32-39

%A Peter J. Ashenden
%A Chris J. Barter
%A Chris D. Marlin
%T The Leopard workstation project
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 15
%N 4
%D September 1987
%P 40-51
%K Adelaide U, Persistent Information Space architecture PISA
%K Multiview, Quentron QDS-1000, V kernel, Modula-2, Eucalypt

%A Y.P. Chaing
%A M.L. Manwaring
%T Direct execution Lisp and cell memory
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 15
%N 4
%D September 1987
%P 52-57

%A J.M. Terry
%T Flow-control machines: the structured execution architecture (SXA)
%J SIGARCH Computer Architecture News
%K arch, CAN
%V 15
%N 4
%D September 1987
%P 58-69