%A Jonathan Allen %T Introduction to VLSI design %B VLSI architecture %E B. Randell %E P.C. Treleaven %I Prentice-Hall International %C Englewood Cliffs, New Jersey %D 1983 %P 1-23 %A D.J. Kinniment %T VLSI and machine architecture %B VLSI architecture %E B. Randell %E P.C. Treleaven %I Prentice-Hall International %C Englewood Cliffs, New Jersey %D 1983 %P 24-33 %A D.J. Kinniment %T Introduction to uncommitted logic arrays %B VLSI architecture %E B. Randell %E P.C. Treleaven %I Prentice-Hall International %C Englewood Cliffs, New Jersey %D 1983 %P 34-43 %A D.J. Kinniment %T Memory system design %B VLSI architecture %E B. Randell %E P.C. Treleaven %I Prentice-Hall International %C Englewood Cliffs, New Jersey %D 1983 %P 44-53 %A Jonathan Edwards %T VLSI process technology selection %B VLSI architecture %E B. Randell %E P.C. Treleaven %I Prentice-Hall International %C Englewood Cliffs, New Jersey %D 1983 %P 54-82 %A Milos Chesney %T Design approach and associated tools %B VLSI architecture %E B. Randell %E P.C. Treleaven %I Prentice-Hall International %C Englewood Cliffs, New Jersey %D 1983 %P 83-88 %A Eric Barton %T Graphics design aids: HED and FatFreddy %B VLSI architecture %E B. Randell %E P.C. Treleaven %I Prentice-Hall International %C Englewood Cliffs, New Jersey %D 1983 %P 89-99 %A James Cownie %T Special tools %B VLSI architecture %E B. Randell %E P.C. Treleaven %I Prentice-Hall International %C Englewood Cliffs, New Jersey %D 1983 %P 100-106 %A Guy Harriman %T A 16-bit processor design %B VLSI architecture %E B. Randell %E P.C. Treleaven %I Prentice-Hall International %C Englewood Cliffs, New Jersey %D 1983 %P 107-113 %A Tony Fuge %T Leaf cell design %B VLSI architecture %E B. Randell %E P.C. Treleaven %I Prentice-Hall International %C Englewood Cliffs, New Jersey %D 1983 %P 114-127 %A F. Anceau %A R. Reis %T Design strategy for VLSI %B VLSI architecture %E B. Randell %E P.C. Treleaven %I Prentice-Hall International %C Englewood Cliffs, New Jersey %D 1983 %P 128-137 %A F. Anceau %T VLSI-processor architecture and design %B VLSI architecture %E B. Randell %E P.C. Treleaven %I Prentice-Hall International %C Englewood Cliffs, New Jersey %D 1983 %P 138-148 %A F. Anceau %A J.P. Schoelkopf %T CAPRI: a silicon for VLSI circuit specified by algorithms %B VLSI architecture %E B. Randell %E P.C. Treleaven %I Prentice-Hall International %C Englewood Cliffs, New Jersey %D 1983 %P 149-154 %A Jean-Jacques Levy %T On the LUCIFER system %B VLSI architecture %E B. Randell %E P.C. Treleaven %I Prentice-Hall International %C Englewood Cliffs, New Jersey %D 1983 %P 155-164 %A J. Alves Marques %A A. Cunha %T Clocking of VLSI circuits %B VLSI architecture %E B. Randell %E P.C. Treleaven %I Prentice-Hall International %C Englewood Cliffs, New Jersey %D 1983 %P 165-178 %A M.T.M. Segers %T Testability in a VLSI environment %B VLSI architecture %E B. Randell %E P.C. Treleaven %I Prentice-Hall International %C Englewood Cliffs, New Jersey %D 1983 %P 179-195 %A Martin Rem %T On the design of restoring logic circuitry %B VLSI architecture %E B. Randell %E P.C. Treleaven %I Prentice-Hall International %C Englewood Cliffs, New Jersey %D 1983 %P 196-204 %A H.T. Kung %A S.Q. Yu %T Integrating high-performance special-purpose devices into a system %B VLSI architecture %E B. Randell %E P.C. Treleaven %I Prentice-Hall International %C Englewood Cliffs, New Jersey %D 1983 %P 205-211 %A M.H. Rogers %T Specification of algorithms for systolic array elements %B VLSI architecture %E B. Randell %E P.C. Treleaven %I Prentice-Hall International %C Englewood Cliffs, New Jersey %D 1983 %P 212-224 %A Peter B. Denyer %T An introduction to bit-serial architectures for VLSI signal processing %B VLSI architecture %E B. Randell %E P.C. Treleaven %I Prentice-Hall International %C Englewood Cliffs, New Jersey %D 1983 %P 225-241 %A Jonathan Allen %T VLSI architectures for signal processing %B VLSI architecture %E B. Randell %E P.C. Treleaven %I Prentice-Hall International %C Englewood Cliffs, New Jersey %D 1983 %P 242-254 %A E. Horbst %T Interdependence of architecture, circuit design and technology %B VLSI architecture %E B. Randell %E P.C. Treleaven %I Prentice-Hall International %C Englewood Cliffs, New Jersey %D 1983 %P 255-275 %A C.H. Sequin %A D.A. Patterson %T Design and implementation of RISC I %B VLSI architecture %E B. Randell %E P.C. Treleaven %I Prentice-Hall International %C Englewood Cliffs, New Jersey %D 1983 %P 276-298 %A C.H. Sequin %A R.M. Fujimoto %T X-tree and Y-components %B VLSI architecture %E B. Randell %E P.C. Treleaven %I Prentice-Hall International %C Englewood Cliffs, New Jersey %D 1983 %P 299-326 %A Ion Filotti %T Parallel general-purpose architectures %B VLSI architecture %E B. Randell %E P.C. Treleaven %I Prentice-Hall International %C Englewood Cliffs, New Jersey %D 1983 %P 327-347 %A Philip C. Treleaven %T Decentralised computer architectures for VLSI %B VLSI architecture %E B. Randell %E P.C. Treleaven %I Prentice-Hall International %C Englewood Cliffs, New Jersey %D 1983 %P 348-380 %A K.J. Berkling %T Experiences with integrating parts of the GMD-reduction-language machine %B VLSI architecture %E B. Randell %E P.C. Treleaven %I Prentice-Hall International %C Englewood Cliffs, New Jersey %D 1983 %P 381-394 %A Shunichi Uchida %T Toward a new generation computer architecture - research and development plan for computer architecture in the fifth generation computer project %B VLSI architecture %E B. Randell %E P.C. Treleaven %I Prentice-Hall International %C Englewood Cliffs, New Jersey %D 1983 %P 395-423